A voltage-mode transmitter transmits an output signal by either charging or discharging an output terminal depending upon the binary value of the bit to be transmitted. To prevent reflections and other undesired effects, the voltage-mode transmitter should be impedance matched to the transmission line coupled to the output terminal. It is conventional to perform this impedance matching by selecting from a number of selectable slices in the voltage-mode transmitter. Each selected slice contributes to the charging and discharging of the output terminal whereas the unselected slices are isolated from the output terminal.
An example voltage-mode transmitter 100 is shown in FIG. 1. A plurality of slices 105 couple in parallel to pair of transmitter output terminals (TX-Out). Each slice 105 includes a pair of transistors M1 and M2 have their gate driven by a positive input signal. In addition, each slice 105 includes a remaining pair of transistors M3 and M4 configured to respond to a negative input signal. The positive and negative input signals form a differential input signal that determines a binary state of a differential output signal driven over the pair of transmitter output terminals. Each transistor M1 through M4 couples to its corresponding output terminal through a corresponding resistor R all having the same resistance. The transistors M1 through M4 are all matched to each other. Thus, the sum of the impedance for any one of these transistors and the impedance for its corresponding resistor R determines the output impedance for each slice 105. In turn, the desired output impedance for voltage-mode transmitter 100 determines how many of slices 105 are active as controlled by a multi-bit calibration code (Res-code<n:0>). Depending upon the calibration code, a given slice 105 may be inactive such that it is isolated from the output terminals or active such that it contributes to the output impedance. Each active slice 105 couples to the output terminals as discussed above. Thus, by adjusting the calibration code, the output impedance for voltage-mode transmitter 100 may be calibrated to match a desired value such as 50Ω.
Although such impedance calibration is conventional, it suffers from a number of issues. For example, a relatively large number of slices 105 is necessary to provide a sufficient calibration range. Such a plurality of slices 105 lowers density and increases complexity. In addition, the plurality of slices 105 causes voltage-mode transmitter 100 to present a relatively large amount of output capacitance at the output terminals. Such a large output capacitance is particularly undesirable for high data rates due to the resulting mismatch to the transmit channel and signal integrity degradation. In addition, slices 105 degrade the output return loss for voltage-mode transmitter 100.
Accordingly, there is a need in the art for improved calibration schemes for voltage-mode transmitters.